USART internal peripheral

Article purpose

The purpose of this article is to:

• briefly introduce the USART peripheral and its main features
• indicate the level of security supported by this hardware block
• explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
• explain, when needed, how to configure the USART peripheral.

Peripheral overview

The USART peripheral is used to interconnect STM32 MPU devices with other systems, typically via RS232 or RS485 protocols. In addition, the USART supports the Synchronous mode that can be used for smartcard interfacing or SPI master/slave operation.

The UART peripheral is similar to the USART but does not support the Synchronous mode.

High-speed data communications can be achieved by using the DMA internal peripheral for multibuffer configuration.

Features

Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.

Security support

USART1 is a secure instance (under ETZPC control).
The other UARTs and USARTs are non-secure instances.

Peripheral usage and associated software

Boot time

All USART (except USART1) and UART instances are boot devices that support serial boot for Flash programming with STM32CubeProgrammer.

Runtime

Overview

The STM32 MPU devices feature four USART instances (supporting both Asynchronous and Synchronous modes), and four UART instances (supporting only Asynchronous mode).

USART1 can be allocated to:

• the Arm^® Cortex^®-A7 secure core to be used under OP-TEE with the USART OP-TEE driver, typically to communicate with a smartcard.

All USART and UART instances can be allocated to:

• the Arm^® Cortex^®-A7 non-secure core to be used under Linux^® with the tty framework. However, the Linux^® kernel supports only the UART Asynchronous mode (Synchronous mode not supported).

or

• the Arm^® Cortex^®-M4 to be used with STM32Cube MPU Package with USART HAL driver. Both USART Synchronous and Asynchronous modes are supported by the STM32Cube MPU Package.

<securetransclude src="ProtectedTemplate:InternalInfo" params="From a hardware point of view, USART1 can be configured as a non-secure peripheral in the ETZPC. However:

• It is reset to the secure status by the RCC. This means that secure services are required to control it from Arm^&reg; Cortex^&reg;-A7 non-secure core, which is not possible from Arm^&reg; Cortex^&reg;-M4 side. The clock control from non-secure world is possible starting from STM32MP15 Rev.B. However the reset control remains secure.
• The MDMA controller must be used with this instance whereas all other USART and UART instances are controlled via DMA1 or DMA2. For simplicity purposes, only the MDMA is shared between the Arm^&reg;Cortex^&reg;-A7 secure and the Arm^&reg;Cortex^&reg;-A7 non secure contexts."></securetransclude>

Chapter Peripheral assignment describes which peripheral instance can be assigned to which context.

<securetransclude src="ProtectedTemplate:ReviewsComments" params="GeraldB W846: Above, the sentence "It is reset to the secure status by the RCC" was written by the technical writer but the meaning of my initial sentence was lost (I do not say that my initial sentence was perfect from english perspective :) ... but this version needs to be reworked and discussed with the TW)"></securetransclude>{{#set:Has reviews comments=true}}

Software frameworks

Domain	Peripheral	Software frameworks			Comment
		Cortex-A7 secure (OP-TEE)	Cortex-A7 non-secure (Linux)	Cortex-M4 (STM32Cube)
Low speed interface	USART	USART OP-TEE driver	Linux serial/tty framework	STM32Cube USART driver

Peripheral configuration

The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the STM32CubeMX tool for all internal peripherals, and then manually completed (particularly for external peripherals) according to the information given in the corresponding software framework article or, for Linux in the Serial TTY device tree configuration article.

Peripheral assignment

Internal peripherals assignment table template

| rowspan="8" | Low speed interface
| rowspan="8" | USART
| USART1
| ☐
| ☐
|
| Assignment (single choice)
|-
| USART2
| 
| ☐
| ☐
| Assignment (single choice)
|-
| USART3
| 
| ☐
| ☐
| Assignment (single choice)
|-
| UART4
| 
| ☐
| ☐
| Assignment (single choice). 
Used for Linux® serial console on ST boards.
|-
| UART5
| 
| ☐
| ☐
| Assignment (single choice)
|-
| USART6
| 
| ☐
| ☐
| Assignment (single choice)
|-
| UART7
| 
| ☐
| ☐
| Assignment (single choice)
|-
| UART8
| 
| ☐
| ☐
| Assignment (single choice)
|-

|}

How to go further

Additional documentation on USART peripheral is available on st.com:

• STM32 USART training presents the STM32 Universal Synchronous/Asynchronous Receiver/Transmitter interface.
• STM32 USART automatic baud rate detection presents STM32 USART automatic baud rate detection.

References

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