BSEC internal peripheral

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Article purpose

The purpose of this article is to

  • briefly introduce the BSEC peripheral and its main features
  • indicate the level of security supported by this hardware block
  • explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
  • explain, when necessary, how to configure the BSEC peripheral.

Peripheral overview

The BSEC peripheral is used to control an OTP (one time programmable) fuse box, used for on-chip non-volatile storage for device configuration and security parameters.

Features

Refer to STM32MP15 reference manuals for the complete list of features, and to the software components, introduced below, to see which features are implemented.

Security support

The BSEC is a secure peripheral.

Peripheral usage and associated software

Boot time

The BSEC is configured at boot time to set up platform security.

Runtime

Overview

The BSEC instance is a system peripheral and is controlled by the Arm® Cortex®-A7 secure:

Info.png
  • BSEC lower OTP access can be made available to the Arm® Cortex®-A7 non-secure.
  • Upper OTP access can be managed as exceptions (in Trusted Boot Chain only, using TF-A), via "secure monitor calls", managed by TF-A or by OP-TEE. Please refer to BSEC device tree configuration for more details.

Software frameworks

Domain Peripheral Software frameworks Comment
Cortex-A7
secure
(OP-TEE)
Cortex-A7
non-secure
(Linux)
Cortex-M4

(STM32Cube)
Security BSEC OP-TEE BSEC driver Linux NVMEM framework

Peripheral configuration

The configuration is based on Device tree, please refer to BSEC device tree configuration article.
It can be applied by the firmware running in a secure context, done in TF-A or in OP-TEE.
It can also be configured by Linux® kernel, please refer to NVMEM overview article.

Peripheral assignment

Internal peripherals assignment table template

| rowspan="1" | Security
| rowspan="1" | BSEC
| BSEC
| 
| 
|
|
|-
|}

How to go further

References

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