“Clock device tree configuration - Bootloader specif”的版本间的差异

来自百问网嵌入式Linux wiki
（创建页面，内容为“== Article purpose == This article describes the specific '''RCC''' internal peripheral configuration done by the Boot chains overview…”）
 
 
（未显示同一用户的11个中间版本）
第1行： 第1行：
 
== Article purpose ==
 
== Article purpose ==
  
−
This article describes the specific [[RCC internal peripheral|'''RCC''' internal peripheral]] configuration done by the [[Boot chains overview|first stage bootloader]]:
+
本文介绍了由 [[Boot chains overview|first stage bootloader]] 执行的特定[[RCC internal peripheral|'''RCC''' internal peripheral]] 配置：
−
* [[TF-A overview|TF-A]] for the Trusted boot chain
+
* [[TF-A overview|TF-A]]用于可信启动链
−
* [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]] for the Basic boot chain
+
* [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]对于基本启动链
  
−
{{Warning|This article explains how to configure the clock tree in the [[RCC_internal_peripheral|RCC]] at boot time.<br/>You can then refer to the [[Clock device tree configuration|clock device tree configuration]] article to understand how to derive each internal peripheral clock tree in Linux<sup>&reg;</sup> OS from the [[RCC_internal_peripheral|RCC]] clock tree.}}
+
{{Warning|本文介绍了如何在启动时在 [[RCC_internal_peripheral|RCC]] 中配置时钟树。<br/>然后，您可以参考[[Clock device tree configuration|clock device tree configuration]] 文章来了解如何在Linux中导出每个内部外围设备时钟树<sup>&reg;</sup> OS from the [[RCC_internal_peripheral|RCC]] 时钟树。}}
  
−
The configuration is performed using the [[Device tree|device tree]] mechanism that provides a hardware description of the [[RCC_internal_peripheral|RCC]] peripheral.
+
配置使用 [[Device tree|device tree]] 机制执行,该机制提供了 [[RCC_internal_peripheral|RCC]] 外围设备的硬件描述。
  
−
This clock tree is only used in the device tree of the boot chain FSBL; so in the TF-A device tree for OpenSTLinux official delivery (or in SPL only for the DDR tuning tool).
+
此时钟树仅在引导链FSBL的设备树中使用; 所以在TF-A设备树中为OpenSTLinux正式交付（或在SPL中仅用于DDR调优工具）。
  
−
Even if the clock tree information is also present in the [[U-Boot_overview|U-Boot]] device tree, it is not used during boot by this SSBL.
+
即使 [[U-Boot_overview|U-Boot]] 设备树中也存在时钟树信息，该SSBL在引导过程中都不会使用它。
  
 
== DT bindings documentation ==
 
== DT bindings documentation ==
  
−
The bootloader clock device tree bindings correspond to the vendor clock DT bindings used by the clk-stm32mp1 driver of the FSBL ([[TF-A overview|TF-A]] or [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]), it is based on:
+
引导加载程序时钟设备树绑定对应于FSBL的clk-stm32mp1驱动程序使用的供应商时钟DT绑定 ([[TF-A overview|TF-A]] 或 [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]), 它基于：
−
*  binding described in [[Clock_device_tree_configuration]]
+
*  [[Clock_device_tree_configuration]]中描述的绑定
−
*  bootloader specific properties described in [[#DT configuration]]
+
*  [[#DT configuration]]中描述的引导加载程序特定属性
  
−
This binding document explains how to write the device tree files for clocks on the bootloader side:
+
这个绑定文档解释了如何为 bootloader 端的时钟编写设备树文件:
−
* [[TF-A overview|TF-A]]: ''tf-a/docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt"<ref name="st,stm32mp1-rcc.txt"> {{CodeSource | TF-A | docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt}} [[TF-A overview|TF-A]] clock binding information file</ref>
+
* [[TF-A overview|TF-A]]: ''tf-a/docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt"<ref name="st,stm32mp1-rcc.txt"> {{CodeSource | TF-A | docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt}} [[TF-A overview|TF-A]] 时钟绑定信息文件</ref>
−
* [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]: ''doc/device-tree-bindings/clock/st,stm32mp1.txt''<ref name="st,stm32mp1.txt">{{CodeSource | U-Boot | doc/device-tree-bindings/clock/st,stm32mp1.txt}} [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]] clock binding information file</ref>
+
* [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]: ''doc/device-tree-bindings/clock/st,stm32mp1.txt''<ref name="st,stm32mp1.txt">{{CodeSource | U-Boot | doc/device-tree-bindings/clock/st,stm32mp1.txt}} [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]] 时钟绑定信息文件</ref>
  
 
== DT configuration ==
 
== DT configuration ==
−
This hardware description is a combination of the '''STM32 microprocessor''' device tree files (''.dtsi'' extension) and '''board''' device tree files (''.dts'' extension). See the [[Device tree]] for an explanation of the device tree file split.
+
该硬件描述是 '''STM32 microprocessor''' 设备树文件 (扩展名为''.dtsi'' ) 和 '''board''' 设备树文件 (''.dts'' extension)的组合。 有关设备树文件拆分的说明，请参阅 [[Device tree]]。
  
−
'''STM32CubeMX''' can be used to generate the board device tree. Refer to [[#How_to_configure_the_DT_using_STM32CubeMX|How to configure the DT using STM32CubeMX]] for more details.
+
'''STM32CubeMX''' 可用于生成板设备树。有关详细信息，请参阅[[#How_to_configure_the_DT_using_STM32CubeMX|How to configure the DT using STM32CubeMX]]。
  
 
=== DT configuration (STM32 level) ===
 
=== DT configuration (STM32 level) ===
−
The STM32MP1 clock nodes are located in ''stm32mp157c.dtsi''<ref name="stm32mp157_pin_dtsi">{{CodeSource | TF-A | fdts/stm32mp157c.dtsi}} (for [[TF-A overview|TF-A]]), {{CodeSource | U-Boot| arch/arm/dts/stm32mp157c.dtsi }} (for [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]): STM32MP157C device tree files</ref> (see [[Device tree]] for more explanations):
+
STM32MP1时钟节点位于 ''stm32mp157c.dtsi''<ref name="stm32mp157_pin_dtsi">中{{CodeSource | TF-A | fdts/stm32mp157c.dtsi}} (for [[TF-A overview|TF-A]]), {{CodeSource | U-Boot| arch/arm/dts/stm32mp157c.dtsi }} (for [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]): STM32MP157C 设备树文件</ref> (有关详细信息，请参阅[[Device tree]] ):
−
* fixed-clock defined in [[#clock node|clock node]]
+
* 固定时钟定义在 [[#clock node|clock node]]
−
* [[RCC_internal_peripheral|RCC]] node for [[#STM32MP1 clock node]]: clock generation and distribution.
+
* [[RCC_internal_peripheral|RCC]] 节点，用于[[#STM32MP1 clock node]]: 时钟生成和分配。
  
 
   / {
 
   / {
第60行： 第60行：
 
   };
 
   };
  
−
Please refer to [[Clock device tree configuration|clock device tree configuration]] for the bindings common with Linux<sup>&reg;</sup> kernel.
+
有关Linux<sup>&reg;</sup>内核常见的绑定，请参考 [[Clock device tree configuration|clock device tree configuration]] 。
  
 
=== DT configuration (board level) ===
 
=== DT configuration (board level) ===
 
==== Clock node ====
 
==== Clock node ====
−
The clock tree is also based on five fixed clocks in the clock node. They are used to define the state of associated ST32MP1 oscillators:
+
时钟树也基于时钟节点中的五个固定时钟。它们用于定义相关ST32MP1振荡器的状态：
 
* clk-lsi
 
* clk-lsi
 
* clk-lse
 
* clk-lse
第70行： 第70行：
 
* clk-hse
 
* clk-hse
 
* clk-csi
 
* clk-csi
−
Please refer to [[Clock device tree configuration|clock device tree configuration]] for detailed information.
+
详细信息请参考[[Clock device tree configuration|clock device tree configuration]]。
  
−
At boot time, the clock tree initialization performs the following tasks:
+
在引导时，时钟树初始化执行以下任务：
−
* enabling of the oscillators present in the device tree and not disabled (node with status="disabled"),
+
* 启用设备树中存在的且未禁用的振荡器(状态为“ disabled”的节点),
−
* disabling of the HSI oscillator if the node is absent or disabled (HSI is always activated by the ROM code).
+
* 如果节点不存在或被禁用，则禁用HSI振荡器(HSI始终由ROM代码激活)。
  
−
This information is located in the following files:
+
此信息位于以下文件中：
 
* STM32MP157C-EV:
 
* STM32MP157C-EV:
 
** [[TF-A overview|TF-A]]: ''fdts/stm32mp157c-ed1.dts''<ref name="stm32mp157c-ed1">{{CodeSource | TF-A | fdts/stm32mp157c-ed1.dts}} STM32MP157C-EV device tree file for [[TF-A overview|TF-A]]</ref>
 
** [[TF-A overview|TF-A]]: ''fdts/stm32mp157c-ed1.dts''<ref name="stm32mp157c-ed1">{{CodeSource | TF-A | fdts/stm32mp157c-ed1.dts}} STM32MP157C-EV device tree file for [[TF-A overview|TF-A]]</ref>
第86行： 第86行：
 
===== Optional properties for "clk-lse" and "clk-hse" external oscillators =====
 
===== Optional properties for "clk-lse" and "clk-hse" external oscillators =====
  
−
For external oscillator HSE and LSE, the default clock configuration is an external crystal/ceramic resonator.
+
对于外部振荡器HSE和LSE，默认时钟配置是外部晶体/陶瓷谐振器。
  
−
Four optional fields are supported:
+
支持四个可选字段：
−
* "st,bypass" configures the external analog clock source (set HSEBYP, LSEBYP),
+
* "st,bypass" 配置外部模拟时钟源 (set HSEBYP, LSEBYP),
−
* "st,digbypass" configures the external digital clock source (set DIGBYP and HSEBYP, LSEBYP),
+
* "st,digbypass" 配置外部数字时钟源 (set DIGBYP and HSEBYP, LSEBYP),
−
* "st,css" activates the clock security system (HSECSSON, LSECSSON),
+
* "st,css" 启动时钟安全系统 (HSECSSON, LSECSSON),
−
* "st,drive" (LSE only) contains the value of the drive for the oscillator (see LSEDRV_ defined in the file ''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc">{{CodeSource | TF-A | include/dt-bindings/clock/stm32mp1-clksrc.h}} (for [[TF-A overview|TF-A]]), {{CodeSource | U-Boot | include/dt-bindings/clock/stm32mp1-clksrc.h}} (for [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]): STM32MP1 DT bindings clock source files</ref>).
+
* "st,drive" (LSE only) 包含振荡器的驱动器值 (请参阅文件“stm32mp1-clksrc.h”中定义的LSEDRV_<ref name="stm32mp1-clksrc">{{CodeSource | TF-A | include/dt-bindings/clock/stm32mp1-clksrc.h}} (for [[TF-A overview|TF-A]]), {{CodeSource | U-Boot | include/dt-bindings/clock/stm32mp1-clksrc.h}} (for [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]): STM32MP1 DT绑定时钟源文件</ref>).
  
 
===== DT configuration for HSE =====
 
===== DT configuration for HSE =====
  
−
The HSE can accept an external crystal/ceramic or external clock source on OSC_IN, digital or analog : the user needs to select the correct frequency and the correct configuration in the device tree, corresponding to the hardware setup.
+
HSE可以在OSC_IN上接受数字或模拟的外部晶体/陶瓷或外部时钟源：用户需要根据硬件设置在设备树中选择正确的频率和正确的配置。
  
−
All the ST boards are using a digital external clock configuration (so device tree with = st,digbypass).
+
所有ST板均使用数字外部时钟配置 (因此，设备树中包含 = st,digbypass).
  
−
For example with the same 24MHz frequency, we have 3 configurations:
+
例如，在相同的24MHz频率下，我们有3种配置：
  
 
[[File:Hse config.jpg|800px|none|]]
 
[[File:Hse config.jpg|800px|none|]]
  
−
* Digital external clock = st,digbypass
+
* 数字外部时钟 = st,digbypass
 
   / {
 
   / {
 
   clocks {
 
   clocks {
第115行： 第115行：
 
   };
 
   };
  
−
* Analog external clock = st,bypass
+
* 模拟外部时钟 = st,bypass
 
   / {
 
   / {
 
   clocks {
 
   clocks {
第126行： 第126行：
 
   };
 
   };
  
−
* Crystal/ ceramic resonators configuration
+
* 晶体/陶瓷谐振器配置
 
   / {
 
   / {
 
   clocks {
 
   clocks {
第138行： 第138行：
 
===== DT configuration for LSE =====
 
===== DT configuration for LSE =====
  
−
Below an example of LSE on board file with 32,768kHz crystal resonators, the drive set to medium high and with activated clock security system.
+
下面是一个带有 32768 kHz 晶体谐振器的LSE板上文件示例，该驱动器设置为中高电平，并具有激活的时钟安全系统。
  
 
   / {
 
   / {
第152行： 第152行：
  
 
===== Optional property for "clk-hsi" internal oscillator =====
 
===== Optional property for "clk-hsi" internal oscillator =====
−
The HSI clock frequency is internally fixed to 64 MHz for the STM32MP15 devices.
+
对于STM32MP15设备，HSI时钟频率在内部固定为64 MHz。
  
−
In the device tree, clk-hsi is the clock after HSIDIV divider (more information on clk_hsi can be found in the RCC chapter in the [[STM32MP15 resources|reference manual]]).<br/>
+
在设备树中，clk-hsi是HSIDIV分频器之后的时钟 (有关clk_hsi的更多信息，请参见 [[STM32MP15 resources|reference manual]]中的RCC章节)。<br/>
−
As a result the frequency of this fixed clock is used to compute the expected HSIDIV for the clock tree initialization.
+
因此，该固定时钟的频率用于计算时钟树初始化的预期HSIDIV。
  
−
Below an example with HSIDIV = 1/1:
+
以下是HSIDIV的示例 = 1/1:
  
 
   / {
 
   / {
第168行： 第168行：
 
   };
 
   };
  
−
Below an example with HSIDIV = 1/2:
+
以下是HSIDIV的示例 = 1/2:
 
   / {
 
   / {
 
   clocks {
 
   clocks {
第180行： 第180行：
 
===== Clock node example =====
 
===== Clock node example =====
  
−
An example of clocks node with:
+
时钟节点的示例包括：
−
* all oscillators switched on (HSE, HSI, LSE, LSI, CSI)
+
* 所有振荡器打开(HSE, HSI, LSE, LSI, CSI)
−
* HSI at 64MHZ (HSIDIV = 1/1)
+
* 64MHZ时的HSI (HSIDIV = 1/1)
−
* HSE using a digital external clock at 24MHz
+
* 使用24MHz数字外部时钟的HSE
−
* LSE using an external crystal a 32.768kHz (the typical frequency)
+
* LSE使用外部晶体a 32.768kHz（典型频率）
  
−
We highlight the customized parts:
+
我们重点介绍定制部件：
 
   / {
 
   / {
 
   clocks {
 
   clocks {
第222行： 第222行：
 
   };
 
   };
  
−
So the resulting board device tree, based on SoC device tree "stm32mp157c.dtsi", is :
+
因此，基于SoC设备树“ stm32mp157c.dtsi”的最终电路板设备树为：
−
 
 
 
   #include "stm32mp157c.dtsi"
 
   #include "stm32mp157c.dtsi"
 
   &clk_hse {
 
   &clk_hse {
第238行： 第237行：
 
   };
 
   };
  
−
It is the configuration used by TF-A for STM32MP157C-EV <ref name="stm32mp157c-ed1"/>
+
它是TF-A用于STM32MP157C-EV <ref name="stm32mp157c-ed1"/>的配置
  
 
==== STM32MP1 clock node ====
 
==== STM32MP1 clock node ====
−
Please refer to [[Clock device tree configuration|clock device tree configuration]] for information on how to specify the number of cells in a clock specifier.
+
有关如何在时钟说明符中指定单元数的信息，请参考[[Clock device tree configuration|clock device tree configuration]] 。
  
−
The bootloader performs a global clock initialization, as described below. The information related to a given board can be found in the board specific device tree files listed in [[#clock_node|clock node]].
+
引导加载程序执行全局时钟初始化，如下所述。与给定电路板相关的信息可以在[[#clock_node|clock node]]中列出的板特定设备树文件中找到。
  
−
The bootloader uses other properties for [[RCC_internal_peripheral|RCC]] node ("st,stm32mp1-rcc" compatible):
+
引导加载程序使用[[RCC_internal_peripheral|RCC]]节点的其他属性 ("st,stm32mp1-rcc" 兼容):
−
* secure-status: related to TZEN bit configuration in RCC_TZCR register that allows to restrict RCC and PWR registers write access
+
* secure-status: 与RCC_TZCR寄存器中的TZEN位配置有关，允许限制RCC和PWR寄存器的写访问
−
* st,clksrc: clock source configuration array
+
* st,clksrc: 时钟源配置阵列
−
* st,clkdiv: clock divider configuration array
+
* st,clkdiv: 时钟分频器配置阵列
−
* st,pll: specific PLL configuration
+
* st,pll: 特定PLL配置
−
* st,pkcs: peripheral kernel clock distribution configuration array.
+
* st,pkcs: 外围内核时钟分布配置阵列。
  
−
All the available clocks are defined as preprocessor macros in ''stm32mp1-clks.h''<ref name="stm32mp1-clks">{{CodeSource | TF-A | include/dt-bindings/clock/stm32mp1-clks.h}} (for [[TF-A overview|TF-A]]), {{CodeSource | U-Boot | include/dt-bindings/clock/stm32mp1-clks.h}} (for [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]): STM32MP1 DT bindings clock identifier files</ref> and can be used in device tree sources.
+
所有可用的时钟都在''stm32mp1-clks.h''<ref name="stm32mp1-clks">{{CodeSource | TF-A | include/dt-bindings/clock/stm32mp1-clks.h}} (for [[TF-A overview|TF-A]]), {{CodeSource | U-Boot | include/dt-bindings/clock/stm32mp1-clks.h}} (for [[U-Boot_overview#SPL:_FSBL_for_basic_boot|U-Boot SPL]]):STM32MP1 DT绑定时钟标识符文件</ref> 并且可以在设备树源中使用。
  
 
===== Defining clock source distribution with st,clksrc property =====
 
===== Defining clock source distribution with st,clksrc property =====
−
This property can be used to configure the clock distribution tree. When used, it must describe the whole distribution tree.
+
此属性可用于配置时钟分配树。使用时，它必须描述整个分发树。
  
−
There are nine clock source selectors for the STM32MP15 devices. They must be configured in the following order: MPU, AXI, MCU, PLL12, PLL3, PLL4, RTC, MCO1, and MCO2.
+
STM32MP15设备有九个时钟源选择器。它们必须按以下顺序配置：MPU、AXI、MCU、PLL12、PLL3、PLL4、RTC、MCO1和MCO2。
  
−
The clock source configuration values are defined by the CLK_<NAME>_<SOURCE> macros located in ''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc"></ref>.
+
时钟源配置值由位于 ''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc"></ref>中的CLK_ <NAME> _ <SOURCE>宏定义。
  
−
Example:
+
例如:
 
<pre>
 
<pre>
 
         st,clksrc = <
 
         st,clksrc = <
第277行： 第276行：
  
 
===== Defining clock dividers with st,clkdiv property =====
 
===== Defining clock dividers with st,clkdiv property =====
−
This property can be used to configure the value of the clock main dividers. When used, it must describe the whole clock divider tree.
+
此属性可用于配置时钟主分频器的值。 使用时，它必须描述整个时钟分频器树。
  
−
There are 11 dividers values for the STM32MP15 devices. They must be configured in the following order: MPU, AXI, MCU, APB1, APB2, APB3, APB4, APB5, RTC, MCO1 and MCO2.
+
STM32MP15器件有11个分频器值。 必须按照以下顺序进行配置：MPU，AXI，MCU，APB1，APB2，APB3，APB4，APB5，RTC，MCO1和MCO2。
  
−
Each divider value uses the DIV coding defined in the [[RCC_internal_peripheral|RCC]] associated register, RCC_xxxDIVR. In most cases, this value is the following:
+
每个分频器值都使用 [[RCC_internal_peripheral|RCC]] 关联寄存器RCC_xxxDIVR中定义的DIV编码。 在大多数情况下，该值如下：
 
* 0x0: not divided
 
* 0x0: not divided
 
* 0x1: division by 2
 
* 0x1: division by 2
第288行： 第287行：
 
* ...
 
* ...
  
−
Note that the coding differs for RTC MCO1 and MCO2:
+
请注意，RTC MCO1和MCO2的编码不同
 
* 0x0: not divided
 
* 0x0: not divided
 
* 0x1: division by 2
 
* 0x1: division by 2
第295行： 第294行：
 
* ...
 
* ...
  
−
Example:
+
示例：
 
<pre>
 
<pre>
 
         st,clkdiv = <
 
         st,clkdiv = <
第313行： 第312行：
  
 
===== Defining peripheral PLL frequencies with st,pll property =====
 
===== Defining peripheral PLL frequencies with st,pll property =====
−
This property can be used to configure PLL frequencies.
+
此属性可用于配置PLL频率。
  
−
The PLL children nodes for PLL1 to PLL4 (see [[STM32MP15 resources|reference manual]] for details) are associated with an index from 0 to 3 (st,pll@0 to st,pll@3). PLLx is off when the associated node is absent.
+
PLL1至PLL4的PLL子节点 (有关详细信息，请参见 [[STM32MP15 resources|reference manual]] ) 与从0到3(st,pll@0 to st,pll@3)的索引相关联。当关联节点不存在时，PLLx关闭。
  
−
'''For {{EcosystemRelease | revision=1.2.0 | range=and after}}''', TF-A automatically selects the most suitable operating point for the platform (please refer to [[How to change the CPU frequency]]), so the PLL1 node is no longer necessary.
+
'''对于 {{EcosystemRelease | revision=1.2.0 | range=and after}}''', TF-A会自动选择最适合平台的工作点(请参考 [[How to change the CPU frequency]]), 因此不再需要PLL1节点。
  
−
Below the available properties for each PLL node:
+
下面是每个PLL节点的可用属性：
−
* cfg contains the PLL configuration parameters in the following order: DIVM, DIVN, DIVP, DIVQ, DIVR, output.
+
* cfg按以下顺序包含PLL配置参数：DIVM，DIVN，DIVP，DIVQ，DIVR，output.
−
:: DIVx values are defined as in [[RCC_internal_peripheral|RCC]]:
+
:: DIVx 值定义为[[RCC_internal_peripheral|RCC]]:
 
:::* 0x0: bypass (division by 1)
 
:::* 0x0: bypass (division by 1)
 
:::* 0x1: division by 2
 
:::* 0x1: division by 2
第328行： 第327行：
 
:::* ...
 
:::* ...
  
−
:: Output contains a bitfield for each output value (1:ON / 0:OFF)
+
:: 输出包含每个输出值的位字段 (1:ON / 0:OFF)
 
:::* BIT(0) → output P : DIVPEN
 
:::* BIT(0) → output P : DIVPEN
 
:::* BIT(1) → output Q : DIVQEN
 
:::* BIT(1) → output Q : DIVQEN
第334行： 第333行：
 
:::Note: PQR(p,q,r) macro can be used to build this value with p, q, r = 0 or 1.
 
:::Note: PQR(p,q,r) macro can be used to build this value with p, q, r = 0 or 1.
  
−
* frac: fractional part of the multiplication factor (optional, when absent PLL is in integer mode).
+
* frac: 乘法因子的小数部分 (可选，当缺少PLL时，它处于整数模式).
  
−
* csg contains the clock spreading generator parameters (optional) in the following order: MOD_PER, INC_STEP and SSCG_MODE.
+
* csg 包含时钟扩展发生器参数（可选），顺序如下：MOD_PER，INC_STEP和SSCG_MODE。
 
:: MOD_PER: modulation period adjustment
 
:: MOD_PER: modulation period adjustment
 
:: INC_STEP: modulation depth adjustment
 
:: INC_STEP: modulation depth adjustment
−
:: SSCG_MODE: Spread spectrum clock generator mode, defined in ''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc"></ref>:
+
:: SSCG_MODE: 扩频时钟发生器模式，在''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc"></ref>中定义：
 
:::* SSCG_MODE_CENTER_SPREAD = 0
 
:::* SSCG_MODE_CENTER_SPREAD = 0
 
:::* SSCG_MODE_DOWN_SPREAD = 1
 
:::* SSCG_MODE_DOWN_SPREAD = 1
第363行： 第362行：
  
 
===== Defining peripheral kernel clock tree distribution with st,pkcs property =====
 
===== Defining peripheral kernel clock tree distribution with st,pkcs property =====
−
This property can be used to configure the peripheral kernel clock selection.
+
此属性可用于配置外围内核时钟选择。
 +
 
  
−
It is a list of peripheral kernel clock source identifiers defined by the CLK_<KERNEL-CLOCK>_<PARENT-CLOCK> macros in the ''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc"></ref> header file.
+
它是由''stm32mp1-clksrc.h''<ref name="stm32mp1-clksrc"></ref> 头文件中的CLK_<KERNEL-CLOCK>_<PARENT-CLOCK>宏定义的外围内核时钟源标识符的列表。
  
−
st,pkcs may not list all the kernel clocks. No specific order is required.
+
st，pkcs可能没有列出所有的内核时钟。无需具体订单。
  
 
Example:
 
Example:
第383行： 第383行：
  
 
===== HSI and CSI clocks calibration =====
 
===== HSI and CSI clocks calibration =====
−
The [[How_to_activate_HSI_and_CSI_oscillators_calibration|calibration]] is an optional feature that can be enabled from the device tree. It
+
The [[How_to_activate_HSI_and_CSI_oscillators_calibration|calibration]] 是一个可选功能，可以从设备树中启用。 允许通过多种方式请求HSI或CSI时钟校准：
−
allows requesting the HSI or CSI clock calibration by several means:
+
* SiP SMC 服务
−
* SiP SMC service
+
* 每X秒定期校准一次
−
* Periodic calibration every X seconds
+
* MCU引发的中断
−
* Interrupt raised by the MCU
 
  
−
This feature requires that a hardware timer is assigned to the calibration sequence.
+
此功能要求为校准序列分配硬件计时器。
  
−
A dedicated interrupt must be defined using "mcu_sev" name to start a calibration on detection of an interrupt raised by the MCU.
+
必须使用“mcu_sev”名称定义专用中断，以便在检测到MCU引发的中断时开始校准。
  
−
* st,hsi-cal: used to enable HSI clock calibration feature.
+
* st,hsi-cal: 用于启用HSI时钟校准功能。
−
* st,csi-cal; used to enable CSI clock calibration feature.
+
* st,csi-cal; 用于启用CSI时钟校准功能。
−
* st,cal-sec: used to enable periodic calibration at specified time intervals from the secure monitor. The time interval must be given in seconds. If not specified, a calibration is only processed for each incoming request.
+
* st,cal-sec: 用于启用来自安全监视器的指定时间间隔的定期校准。 时间间隔必须以秒为单位。如果未指定，则仅对每个传入请求进行校准。
  
−
Example:
+
示例：
 
<pre>
 
<pre>
 
&rcc {
 
&rcc {
第410行： 第409行：
  
 
==How to configure the DT using STM32CubeMX==
 
==How to configure the DT using STM32CubeMX==
−
The [[STM32CubeMX]] tool can be used to configure the STM32MPU device and get the corresponding [[Device_tree#STM32|platform configuration device tree]] files.
+
The [[STM32CubeMX]] 工具可用于配置STM32MPU设备并获取相应的 [[Device_tree#STM32|platform configuration device tree]] 文件。
  
−
The STM32CubeMX may not support all the properties described in the above [[#DT bindings documentation|DT bindings documentation]] paragraph. <br />If so, the tool inserts '''user sections''' in the generated device tree.<br /> These sections can then be edited to add some properties and they are preserved from one generation to another.
+
STM32CubeMX可能不支持上述[[#DT bindings documentation|DT bindings documentation]] 段中描述的所有属性。 <br />如果是，该工具将在生成的设备树中插入“用户部分”。<br /> 然后可以编辑这些部分以添加一些属性，并将它们一代一代地保留下来。
  
−
Refer to [[STM32CubeMX]] user manual for further information.
+
有关详细信息，请参阅 [[STM32CubeMX]] 用户手册。
  
 
==References==
 
==References==
−
Please refer to the following links for additional information:
+
有关其他信息，请参阅以下链接
  
 
<references />
 
<references />
−
 
−
<noinclude>
 
−
[[Category:Device tree configuration]]
 
−
[[Category:Trusted Firmware-A (TF-A)]]
 
−
[[Category:U-Boot]]
 
−
{{ArticleBasedOnModel | Peripheral or framework device tree configuration model}}
 
−
{{PublicationRequestId | 15046| 2020-02-21 | 10612 (AnneJ - 2019-02-04)}}
 
−
</noinclude>
 

2020年11月4日 (三) 17:38的最新版本

Article purpose

本文介绍了由 first stage bootloader 执行的特定RCC internal peripheral 配置：

Warning.png 本文介绍了如何在启动时在 RCC 中配置时钟树。
然后，您可以参考clock device tree configuration 文章来了解如何在Linux中导出每个内部外围设备时钟树® OS from the RCC 时钟树。

配置使用 device tree 机制执行,该机制提供了 RCC 外围设备的硬件描述。

此时钟树仅在引导链FSBL的设备树中使用; 所以在TF-A设备树中为OpenSTLinux正式交付（或在SPL中仅用于DDR调优工具）。

即使 U-Boot 设备树中也存在时钟树信息，该SSBL在引导过程中都不会使用它。

DT bindings documentation

引导加载程序时钟设备树绑定对应于FSBL的clk-stm32mp1驱动程序使用的供应商时钟DT绑定 (TF-A 或 U-Boot SPL), 它基于：

这个绑定文档解释了如何为 bootloader 端的时钟编写设备树文件:

  • TF-A: tf-a/docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt"[1]
  • U-Boot SPL: doc/device-tree-bindings/clock/st,stm32mp1.txt[2]

DT configuration

该硬件描述是 STM32 microprocessor 设备树文件 (扩展名为.dtsi ) 和 board 设备树文件 (.dts extension)的组合。 有关设备树文件拆分的说明，请参阅 Device tree。

STM32CubeMX 可用于生成板设备树。有关详细信息，请参阅How to configure the DT using STM32CubeMX。

DT configuration (STM32 level)

STM32MP1时钟节点位于 stm32mp157c.dtsi[3] (有关详细信息，请参阅Device tree ): 

 / {
 ...
 	clocks {
 		clk_hse: clk-hse {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <24000000>;
 		};
 
 ...
   	};
 ...
 	soc {
 ...
 		rcc: rcc@50000000 {
 			compatible = "st,stm32mp1-rcc", "syscon";
 			reg = <0x50000000 0x1000>;
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 		};
...
 
 	};
 
 };

有关Linux®内核常见的绑定，请参考 clock device tree configuration 。

DT configuration (board level)

Clock node

时钟树也基于时钟节点中的五个固定时钟。它们用于定义相关ST32MP1振荡器的状态：

  • clk-lsi
  • clk-lse
  • clk-hsi
  • clk-hse
  • clk-csi

详细信息请参考clock device tree configuration。

在引导时，时钟树初始化执行以下任务：

  • 启用设备树中存在的且未禁用的振荡器(状态为“ disabled”的节点),
  • 如果节点不存在或被禁用，则禁用HSI振荡器(HSI始终由ROM代码激活)。

此信息位于以下文件中：

  • STM32MP157C-EV:
  • STM32MP157X-DK:
Optional properties for "clk-lse" and "clk-hse" external oscillators

对于外部振荡器HSE和LSE，默认时钟配置是外部晶体/陶瓷谐振器。

支持四个可选字段：

  • "st,bypass" 配置外部模拟时钟源 (set HSEBYP, LSEBYP),
  • "st,digbypass" 配置外部数字时钟源 (set DIGBYP and HSEBYP, LSEBYP),
  • "st,css" 启动时钟安全系统 (HSECSSON, LSECSSON),
  • "st,drive" (LSE only) 包含振荡器的驱动器值 (请参阅文件“stm32mp1-clksrc.h”中定义的LSEDRV_[8]).
DT configuration for HSE

HSE可以在OSC_IN上接受数字或模拟的外部晶体/陶瓷或外部时钟源：用户需要根据硬件设置在设备树中选择正确的频率和正确的配置。

所有ST板均使用数字外部时钟配置 (因此，设备树中包含 = st,digbypass).

例如，在相同的24MHz频率下，我们有3种配置：

Hse config.jpg
  • 数字外部时钟 = st,digbypass
 	/ {
 		clocks {
 			clk_hse: clk-hse {
 				#clock-cells = <0>;
 				compatible = "fixed-clock";
 				clock-frequency = <24000000>;
 				st,digbypass;
 			};
 	};
  • 模拟外部时钟 = st,bypass
 	/ {
 		clocks {
 			clk_hse: clk-hse {
 				#clock-cells = <0>;
 				compatible = "fixed-clock";
 				clock-frequency = <24000000>;
 				st,bypass;
			};
 	};
  • 晶体/陶瓷谐振器配置
 	/ {
 		clocks {
 			clk_hse: clk-hse {
 				#clock-cells = <0>;
 				compatible = "fixed-clock";
 				clock-frequency = <24000000>;
 			};
 	};
DT configuration for LSE

下面是一个带有 32768 kHz 晶体谐振器的LSE板上文件示例，该驱动器设置为中高电平，并具有激活的时钟安全系统。 

 	/ {
 		clocks {
 			clk_lse: clk-lse {
 				#clock-cells = <0>;
 				compatible = "fixed-clock";
 				clock-frequency = <32768>;
 				st,css;
 				st,drive = <LSEDRV_MEDIUM_HIGH>;
 			};
 	};
Optional property for "clk-hsi" internal oscillator

对于STM32MP15设备，HSI时钟频率在内部固定为64 MHz。

在设备树中，clk-hsi是HSIDIV分频器之后的时钟 (有关clk_hsi的更多信息，请参见 reference manual中的RCC章节)。
因此，该固定时钟的频率用于计算时钟树初始化的预期HSIDIV。

以下是HSIDIV的示例 = 1/1: 

 	/ {
 		clocks {
 			clk_hsi: clk-hsi {
 				#clock-cells = <0>;
 				compatible = "fixed-clock";
 				clock-frequency = <64000000>;
 			};
 	};

以下是HSIDIV的示例 = 1/2: 

 	/ {
 		clocks {
 			clk_hsi: clk-hsi {
 				#clock-cells = <0>;
 				compatible = "fixed-clock";
 				clock-frequency = <32000000>;
 			};
 	};
Clock node example

时钟节点的示例包括：

  • 所有振荡器打开(HSE, HSI, LSE, LSI, CSI)
  • 64MHZ时的HSI (HSIDIV = 1/1)
  • 使用24MHz数字外部时钟的HSE
  • LSE使用外部晶体a 32.768kHz（典型频率）

我们重点介绍定制部件： 

 / {
 	clocks {
 		clk_hse: clk-hse {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <24000000>;
 			st,digbypass;
 		};
 
 		clk_hsi: clk-hsi {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <64000000>;
 		};
 
 		clk_lse: clk-lse {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <32768>;
 		};
 
 		clk_lsi: clk-lsi {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <32000>;
 		};
 
 		clk_csi: clk-csi {
 			#clock-cells = <0>;
 			compatible = "fixed-clock";
 			clock-frequency = <4000000>;
 		};
 	};
 };

因此，基于SoC设备树“ stm32mp157c.dtsi”的最终电路板设备树为： 

 #include "stm32mp157c.dtsi"
 &clk_hse {
 	clock-frequency = <24000000>;
 	st,digbypass;
 };
 
 &clk_hsi {
 	clock-frequency = <64000000>;
 };
 
 &clk_lse {
 	clock-frequency = <32768>;
 };

它是TF-A用于STM32MP157C-EV [4]的配置

STM32MP1 clock node

有关如何在时钟说明符中指定单元数的信息，请参考clock device tree configuration 。

引导加载程序执行全局时钟初始化，如下所述。与给定电路板相关的信息可以在clock node中列出的板特定设备树文件中找到。

引导加载程序使用RCC节点的其他属性 ("st,stm32mp1-rcc" 兼容):

  • secure-status: 与RCC_TZCR寄存器中的TZEN位配置有关，允许限制RCC和PWR寄存器的写访问
  • st,clksrc: 时钟源配置阵列
  • st,clkdiv: 时钟分频器配置阵列
  • st,pll: 特定PLL配置
  • st,pkcs: 外围内核时钟分布配置阵列。

所有可用的时钟都在stm32mp1-clks.h[9] 并且可以在设备树源中使用。

Defining clock source distribution with st,clksrc property

此属性可用于配置时钟分配树。使用时，它必须描述整个分发树。

STM32MP15设备有九个时钟源选择器。它们必须按以下顺序配置：MPU、AXI、MCU、PLL12、PLL3、PLL4、RTC、MCO1和MCO2。

时钟源配置值由位于 stm32mp1-clksrc.h[8]中的CLK_ <NAME> _ <SOURCE>宏定义。

例如: 

        st,clksrc = <
                CLK_MPU_PLL1P
                CLK_AXI_PLL2P
                CLK_MCU_PLL3P
                CLK_PLL12_HSE
                CLK_PLL3_HSE
                CLK_PLL4_HSE
                CLK_RTC_LSE
                CLK_MCO1_DISABLED
                CLK_MCO2_DISABLED
        >;
Defining clock dividers with st,clkdiv property

此属性可用于配置时钟主分频器的值。 使用时，它必须描述整个时钟分频器树。

STM32MP15器件有11个分频器值。 必须按照以下顺序进行配置：MPU，AXI，MCU，APB1，APB2，APB3，APB4，APB5，RTC，MCO1和MCO2。

每个分频器值都使用 RCC 关联寄存器RCC_xxxDIVR中定义的DIV编码。 在大多数情况下，该值如下：

  • 0x0: not divided
  • 0x1: division by 2
  • 0x2: division by 4
  • 0x3: division by 8
  • ...

请注意，RTC MCO1和MCO2的编码不同

  • 0x0: not divided
  • 0x1: division by 2
  • 0x2: division by 3
  • 0x3: division by 4
  • ...

示例： 

        st,clkdiv = <
                1 /*MPU*/
                0 /*AXI*/
                0 /*MCU*/
                1 /*APB1*/
                1 /*APB2*/
                1 /*APB3*/
                1 /*APB4*/
                2 /*APB5*/
                23 /*RTC*/
                0 /*MCO1*/
                0 /*MCO2*/
        >;
Defining peripheral PLL frequencies with st,pll property

此属性可用于配置PLL频率。

PLL1至PLL4的PLL子节点 (有关详细信息，请参见 reference manual ) 与从0到3(st,pll@0 to st,pll@3)的索引相关联。当关联节点不存在时，PLLx关闭。

对于 ecosystem release ≥ v1.2.0{{#set:Ecosystem release=revision of a previous flow 1.2.0}} , TF-A会自动选择最适合平台的工作点(请参考 如何更改CPU频率), 因此不再需要PLL1节点。

下面是每个PLL节点的可用属性：

  • cfg按以下顺序包含PLL配置参数：DIVM，DIVN，DIVP，DIVQ，DIVR，output.
DIVx 值定义为RCC:
  • 0x0: bypass (division by 1)
  • 0x1: division by 2
  • 0x2: division by 3
  • 0x3: division by 4
  • ...
输出包含每个输出值的位字段 (1:ON / 0:OFF)
  • BIT(0) → output P : DIVPEN
  • BIT(1) → output Q : DIVQEN
  • BIT(2) → output R : DIVREN
Note: PQR(p,q,r) macro can be used to build this value with p, q, r = 0 or 1.
  • frac: 乘法因子的小数部分 (可选，当缺少PLL时，它处于整数模式).
  • csg 包含时钟扩展发生器参数（可选），顺序如下：MOD_PER，INC_STEP和SSCG_MODE。
MOD_PER: modulation period adjustment
INC_STEP: modulation depth adjustment
SSCG_MODE: 扩频时钟发生器模式，在stm32mp1-clksrc.h[8]中定义：
  • SSCG_MODE_CENTER_SPREAD = 0
  • SSCG_MODE_DOWN_SPREAD = 1

Example: 

	st,pll@0 {
		cfg = < 1 53 0 0 0 1 >;
		frac = < 0x810 >;
	};
	st,pll@1 {
		cfg = < 1 43 1 0 0 PQR(0,1,1) >;
		csg = < 10 20 1 >;
	};
	st,pll@2 {
		cfg = < 2 85 3 13 3 0 >;
		csg = < 10 20 SSCG_MODE_CENTER_SPREAD >;
	};
	st,pll@3 {
		cfg = < 2 78 4 7 9 3 >;
	};
Defining peripheral kernel clock tree distribution with st,pkcs property

此属性可用于配置外围内核时钟选择。


它是由stm32mp1-clksrc.h[8] 头文件中的CLK_<KERNEL-CLOCK>_<PARENT-CLOCK>宏定义的外围内核时钟源标识符的列表。

st，pkcs可能没有列出所有的内核时钟。无需具体订单。

Example: 

	st,pkcs = <
		CLK_STGEN_HSE
		CLK_CKPER_HSI
		CLK_USBPHY_PLL2P
		CLK_DSI_PLL2Q
                CLK_I2C46_HSI
                CLK_UART1_HSI
                CLK_UART24_HSI
	>;
HSI and CSI clocks calibration

The calibration 是一个可选功能，可以从设备树中启用。 允许通过多种方式请求HSI或CSI时钟校准：

  • SiP SMC 服务
  • 每X秒定期校准一次
  • MCU引发的中断

此功能要求为校准序列分配硬件计时器。

必须使用“mcu_sev”名称定义专用中断，以便在检测到MCU引发的中断时开始校准。

  • st,hsi-cal: 用于启用HSI时钟校准功能。
  • st,csi-cal; 用于启用CSI时钟校准功能。
  • st,cal-sec: 用于启用来自安全监视器的指定时间间隔的定期校准。 时间间隔必须以秒为单位。如果未指定，则仅对每个传入请求进行校准。

示例： 

	&rcc {
		st,hsi-cal;
		st,csi-cal;
		st,cal-sec = <15>;
		secure-interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>,
				<GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-names = "mcu_sev", "wakeup";
	};

How to configure the DT using STM32CubeMX

The STM32CubeMX 工具可用于配置STM32MPU设备并获取相应的 platform configuration device tree 文件。

STM32CubeMX可能不支持上述DT bindings documentation 段中描述的所有属性。
如果是，该工具将在生成的设备树中插入“用户部分”。
然后可以编辑这些部分以添加一些属性，并将它们一代一代地保留下来。

有关详细信息，请参阅 STM32CubeMX 用户手册。

References

有关其他信息，请参阅以下链接

  1. ↑ docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt| |}} docs/devicetree/bindings/clock/st,stm32mp1-rcc.txt TF-A 时钟绑定信息文件
  2. ↑ doc/device-tree-bindings/clock/st,stm32mp1.txt| |}} doc/device-tree-bindings/clock/st,stm32mp1.txt U-Boot SPL 时钟绑定信息文件
  3. ↑ 中fdts/stm32mp157c.dtsi| |}} fdts/stm32mp157c.dtsi (for TF-A), arch/arm/dts/stm32mp157c.dtsi | |}} arch/arm/dts/stm32mp157c.dtsi (for U-Boot SPL): STM32MP157C 设备树文件
  4. ↑ 4.04.1 fdts/stm32mp157c-ed1.dts| |}} fdts/stm32mp157c-ed1.dts STM32MP157C-EV device tree file for TF-A
  5. ↑ arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi| |}} arch/arm/dts/stm32mp157c-ed1-u-boot.dtsi STM32MP157C-EV device tree file for U-Boot SPL
  6. ↑ fdts/stm32mp157a-dk1.dts| |}} fdts/stm32mp157a-dk1.dts STM32MP157A-DK device tree file for TF-A
  7. ↑ arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi| |}} arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi STM32MP157A-DK device tree file for U-Boot SPL
  8. ↑ 8.08.18.28.3 include/dt-bindings/clock/stm32mp1-clksrc.h| |}} include/dt-bindings/clock/stm32mp1-clksrc.h (for TF-A), include/dt-bindings/clock/stm32mp1-clksrc.h| |}} include/dt-bindings/clock/stm32mp1-clksrc.h (for U-Boot SPL): STM32MP1 DT绑定时钟源文件
  9. ↑ include/dt-bindings/clock/stm32mp1-clks.h| |}} include/dt-bindings/clock/stm32mp1-clks.h (for TF-A), include/dt-bindings/clock/stm32mp1-clks.h| |}} include/dt-bindings/clock/stm32mp1-clks.h (for U-Boot SPL):STM32MP1 DT绑定时钟标识符文件
取自“http://wiki.100ask.org/index.php?title=Clock_device_tree_configuration_-_Bootloader_specif&oldid=7368”