查看“USBPHYC internal peripheral”的源代码

==Article purpose==
The purpose of this article is to
* briefly introduce the USBPHYC  peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
* explain, when necessary, how to configure the USBPHYC peripheral.

==Peripheral overview==
The '''USBPHYC''' peripheral is a block that contains a dual port USB high-speed UTMI+ PHY and a UTMI switch. It makes the interface between:
* the internal USB controllers ([[USBH_internal_peripheral|USBH]] and [[OTG_internal_peripheral|OTG]])
* the external USB physical lines (DP, DM)

===Features===
The '''USBPHYC''' peripheral:
* controls a two port high-speed PHY:
** Port1 connected to the [[USBH_internal_peripheral|USBH]] controller
** Port2 connected via the UTMI+switch to the [[USBH_internal_peripheral|USBH]] or to the [[OTG_internal_peripheral|OTG]] controller
* sets the PLL values
* performs other controls (and monitoring) on the PHY.

[[File:USBPHYC.png|link=]]

Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to see which features are implemented.

===Security support===
The '''USBPHYC''' is a '''non-secure''' peripheral.

==Peripheral usage and associated software==
===Boot time===
USBPHYC instances are boot devices that support Flash programming with [[STM32CubeProgrammer]].

The USBPHYC peripheral is used by [[STM32MP15 ROM code overview|ROM code]], [[Boot chain overview|FSBL]] and [[Boot chain overview|SSBL]] when using [[OTG_internal_peripheral|OTG]] in Device mode (DFU).<br>

The [[Boot chain overview|SSBL]] can use [[OTG_internal_peripheral|OTG]] in Host mode or [[USBH_internal_peripheral|USBH]] (mass storage). The USBPHYC peripheral can be used to boot on a kernel stored on a USB key, or after a kernel panic to perform the crash dump saving to the USB key.

===Runtime===
====Overview====
The USBPHYC peripheral can be allocated to the the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be used under Linux<sup>&reg;</sup> with [[PHY overview | PHY framework]].

The [[#Peripheral assignment|peripheral assignment]] chapter describes which peripheral instance can be assigned to which context.

====Software frameworks====
{{:Internal_peripherals_software_table_template}}
 | High-speed interface
 | [[USBPHYC internal peripheral|USBPHYC (USB HS PHY controller)]]
 | 
 | [[PHY overview|Linux PHY framework]]
 | 
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals) according to the information given in the corresponding software framework article.

For Linux kernel configuration, please refer to [[USBPHYC device tree configuration|USBPHYC device tree configuration]].

====Peripheral assignment====
{{:Internal_peripherals_assignment_table_template}}
<onlyinclude>
 | rowspan="1" | High speed interface
 | rowspan="1" | [[USBPHYC internal peripheral|USBPHYC (USB HS PHY controller)]]
 | USBPHYC (USB HS PHY controller)
 | 
 | <span title="assignable peripheral" style="font-size:21px">☐</span>
 |
 |
 |-
</onlyinclude>
 |}