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STM32MP15 microprocessor
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In a first part, this article shows the STM32MP157 line '''part number codification''' and '''block diagram'''. STM32MP157 belongs to STM32MP1 Series (refer to the list of part numbers provided below).<br><br> The second part of this article digs into technical aspects, and provides entry points to: * STM32MP15 '''documentation''' * articles dedicated to '''Internal peripherals''' that make the transition towards the software frameworks required to control these peripherals * the list of '''boards''' supporting STM32MP15 devices * the supported '''software distributions''', that can be dowloaded into the STM32MP15 device. ==Introduction == STM32MP15 microprocessors are based on the Arm<sup>®</sup> '''Cortex<sup>®</sup>-A7''' dual core. They support Trustzone mode for secure operations, a '''Vivante GPU''' and an Arm<sup>®</sup> '''Cortex<sup>®</sup>-M4 coprocessor'''. Arm<sup>®</sup> Cortex<sup>®</sup>-M4 coprocessor and its peripheral set are directly inherited from the STM32 MCU family <ref>[http://www.st.com/en/microcontrollers/stm32-32-bit-arm-cortex-mcus.html STM32 MCU family]</ref>. ==Part number codification == The table below shows the STM32MP15 microprocessor different part numbers available, together with their corresponding internal peripherals, security options and packages.<br /> === STM32MP15x lines === :{| class="st-table" |- ! !! style="text-align:center;" | Cortex-A7 !! style="text-align:center;" | Cortex-M4 !! style="text-align:center;" | GPU !! style="text-align:center;" | Display !! style="text-align:center;" | CAN |- | STM32MP15'''1''' || Single || Yes || No || TFT || No |- | STM32MP15'''3''' || Dual || Yes || No || TFT || Yes |- | STM32MP15'''7''' || Dual || Yes || Yes || TFT/DSI || Yes |} === Security and Cortex-A7 frequency=== :{| class="st-table" ! !! style="text-align:center;" | Security !! style="text-align:center;" | Cortex-A7 frequency |- | STM32MP15x'''A''' || Basic || 650 MHz<ref name="mission profile">Exposure to maximum rating conditions for extended periods may affect device reliability. Device mission profile (application conditions) is compliant with JEDEC JESD47 qualification standard. Refer to the [[STM32MP15 resources#DS12505|STM32MP15 Datasheet]] and [[STM32MP15 resources#AN5438|AN5438]] for further information.</ref> |- | STM32MP15x'''C''' || Secure boot + Cryptography ([[CRYP internal peripheral|CRYP]]) || 650 MHz<ref name="mission profile"></ref> |- | STM32MP15x'''D''' || Basic || 800 MHz<ref name="mission profile"></ref><ref name="frequency">800 MHz part numbers are only available with '1' as junction temperatures range suffix (- 20 to + 105 °C).</ref> |- | STM32MP15x'''F''' || Secure boot + Cryptography ([[CRYP internal peripheral|CRYP]]) || 800 MHz<ref name="mission profile"></ref><ref name="frequency"></ref> |} === Packages === :{| class="st-table" | STM32MP15xx'''AA''' || TFBGA448 18x18 |- | STM32MP15xx'''AB''' || LFBGA354 16x16 |- | STM32MP15xx'''AC''' || TFBGA361 12x12 |- | STM32MP15xx'''AD''' || TFBGA257 10x10 |} === Junction temperature === :{| class="st-table" | STM32MP15xxxx'''1''' || - 20 to + 105 °C<ref name="mission profile"></ref><ref name="frequency"></ref> |- | STM32MP15xxxx'''3''' || - 40 to + 125 °C<ref name="mission profile"></ref> |} == Block diagram== Here below is the STM32MP157F block diagram offering the richest features set of the STM32MP15 microprocessor. [[File: STM32MP157F_marketing_block_diagram.png|center|link=]] ==Technical documentation== * [[STM32MP15 resources#Reference manuals|STM32MP15 Reference Manual]]: device and internal peripheral user specifications * [[STM32MP15 resources#DS12505|STM32MP15 Datasheet]]: electrical characteristics, package and pinout descriptions ==Internal peripherals== [[File: STM32MP1IPsOverview.png|link=STM32MP15_peripherals_overview|thumb|Internal peripherals]] [[STM32MP15 peripherals overview]] article gives a description of all the internal peripherals available on STM32MP15 devices, with direct links to the articles where you can find: * an overview of each peripheral * the list of instances available for each peripheral type, * information on the way each instance can be shared between Arm<sup>®</sup> Cortex<sup>®</sup>-A7 and Cortex<sup>®</sup>-M4 cores, * direct links to the software frameworks used to control the peripheral from different Arm<sup>®</sup> cores and security modes such as Cortex<sup>®</sup>-A7 non secure, Cortex<sup>®</sup>-A7 secure or Cortex<sup>®</sup>-M4 (non secure). <br clear=all> == How to get further with STM32MP15 ecosystem== ===Boards=== The list of boards that integrate STM32MP15 devices can be found in [[STM32MP15 boards]] article. ===Supported software distributions=== {|class="st-table" style="text-align:center; width:95%; cellspacing=0" |- style="vertical-align:bottom;" | [[File:ST_logo.png|100px|link=STM32MPU Embedded Software distribution| text |STM32MPU Embedded Software distribution]] <br> [[STM32MPU Embedded Software distribution|'''STM32MPU Embedded Software distribution''']] | [[File:Android_logo.png|80px|link=:Category:STM32MPU Embedded Software distribution for Android| text |STM32MPU Embedded Software distribution for Android]] <br> [[:Category:STM32MPU Embedded Software distribution for Android|'''STM32MPU Embedded Software distribution for Android''']] |} Click the links above to find information on: *Distribution composition and associated software architecture *Associated release notes == References and foot notes== <references/>
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