查看“RTC internal peripheral”的源代码

==Article purpose==
The purpose of this article is to
* briefly introduce the RTC peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how it can be allocated to the three runtime contexts and linked to the corresponding software components
* explain, when needed, how to configure the RTC peripheral.

==Peripheral overview==
The '''RTC''' peripheral is used to provide the date and clock to the application. It supports programmable alarms and wake up capabilities.<br />

===Features===
Refer to [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to know which features are really implemented.<br>

===Security support===
The '''RTC''' peripheral is a '''secure''' peripheral.

==Peripheral usage and associated software==
===Boot time===
By default after a backup domain power-on reset (performed at boot time), all RTC registers can be read or written in both secure and non-secure modes.<br />
In OpenSTLinux distribution, the first stage bootloader (FSBL, running in secure mode) keeps this default configuration, leaving full control to Linux<sup>&reg;</sup> at runtime.
{{InternalInfo|This configuration could be changed in RTC_SMCR register, per sub function (initialization, calibration, alarm A, alarm B, wake up timer and time-stamp). The customer may adapt this configuration to his needs, sharing some functions with the coprocessor or the secure world. This would require some code adaptation because, in case some functions are put in secure world, then secure services are needed to access to some control registers (like the write protection) from Linux.}}
The '''RTC''' peripheral is able to generate two interrupts:
* A secure interrupt, connected to the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 [[GIC internal peripheral|GIC]], not used in OpenSTLinux distribution.
* A non-secure interrupt, connected both to Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 [[GIC internal peripheral|GIC]] and Cortex-M4 [[NVIC internal peripheral|NVIC]]: this interrupt is used on Linux<sup>&reg;</sup> and by default in OpenSTLinux distribution.<br />
The '''RTC''' peripheral is part of the backup domain which reset and clock are controlled via the [[RCC internal peripheral|RCC]] by the first stage bootloader (FSBL, running in secure mode) at boot time.<br />
The RTC reset occurs when the backup domain is reset. To avoid clearing the [[TAMP internal peripheral|TAMP]] register contents, this is only done on cold boot, not on wake up.

===Runtime===
====Overview====
The '''RTC''' peripheral can be allocated to the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be used under Linux<sup>&reg;</sup> with [[RTC overview|RTC framework]].

====Software frameworks====

{{:Internal_peripherals_software_table_template}}
 | Core
 | [[RTC internal peripheral|RTC]]
 |
 | [[RTC overview|Linux RTC framework]]
 |
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (especially for external peripherals) according to the information given in the corresponding software framework article.

For Linux kernel configuration, please refer to [[RTC device tree configuration|RTC device tree configuration]].

====Peripheral assignment====

{{:Internal_peripherals_assignment_table_template}}
<onlyinclude>
 | rowspan="1" | Core
 | rowspan="1" | [[RTC internal peripheral|RTC]]
 | RTC
 | <span title="assignable peripheral" style="font-size:21px">✓</span>
 | <span title="assignable peripheral" style="font-size:21px">✓</span>
 |
 | RTC is mandatory to resynchronize [[STGEN_internal_peripheral | STGEN]] after exiting [[Power_overview | low-power modes]].
 |-
</onlyinclude>
 |}

<noinclude>
[[Category:Core peripherals]]
{{PublicationRequestId | 10398 | 2019-01-21 | AnneJ}}
{{ArticleBasedOnModel| Internal peripheral article model}}
</noinclude>