查看“DMA internal peripheral”的源代码

==Article purpose==
The purpose of this article is to:
* briefly introduce the DMA peripheral and its main features
* indicate the level of security supported by this hardware block
* explain how each instance can be allocated to the three runtime contexts and linked to the corresponding software components
* explain, when necessary, how to configure the DMA peripheral.

==Peripheral overview==
The '''DMA''' peripheral is used to perform direct accesses from/to a device or a memory. Each DMA instance supports 8 channels. The selection of the device connected to each DMA channel and controlling the DMA transfers is done via the [[DMAMUX internal peripheral|DMAMUX]].<br /><br />

Note: Directly accessing [[DDRCTRL and DDRPHYC internal peripherals|DDR]] from the DMA is not recommended for high-bandwith or latency-critical transfers. This means that DMA transfers configured by the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 operating system, that usually target buffers in external memory, require a hardware mechanism to chain the DMA and a [[MDMA internal peripheral|MDMA]] channel in order to achieve the following flow:<br />
:DDR<-> MDMA <-> MCU SRAM <-> DMA <-> device <br />
This feature was already present on STM32H7 microcontroller Series. It is documented in application note  AN5001<ref>http://www.st.com/resource/en/application_note/dm00360392.pdf</ref>.

===Features===
Refer to the [[STM32MP15 resources#Reference manuals|STM32MP15 reference manuals]] for the complete list of features, and to the software components, introduced below, to see which features are implemented.

===Security support===
The DMA is a '''non-secure''' peripheral.

==Peripheral usage and associated software==
===Boot time===
The DMA is not used at boot time.

===Runtime===
====Overview====
Each DMA instance can be allocated to:
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-A7 non-secure core to be controlled in Linux<sup>&reg;</sup> by the [[Dmaengine overview|dmaengine]] framework
or
* the Arm<sup>&reg;</sup> Cortex<sup>&reg;</sup>-M4 to be controlled in STM32Cube MPU Package by the [[STM32CubeMP1 architecture|DMA HAL driver]]

====Software frameworks====
{{:Internal_peripherals_software_table_template}}
 | Core/DMA
 | [[DMA internal peripheral|DMA]]
 | 
 | [[Dmaengine overview|Linux dmaengine framework]]
 | [[STM32CubeMP1 architecture|STM32Cube DMA driver]]
 |
 |-
 |}

====Peripheral configuration====
The configuration is applied by the firmware running in the context to which the peripheral is assigned. The configuration can be done alone via the [[STM32CubeMX]] tool for all internal peripherals, and then manually completed (particularly for external peripherals), according to the information given in the corresponding software framework article.

====Peripheral assignment====
{{:Internal_peripherals_assignment_table_template}}
<onlyinclude>
 | rowspan="2" | Core/DMA
 | rowspan="2" | [[DMA internal peripheral|DMA]]
 | DMA1
 |
 | <span title="assignable peripheral" style="font-size:21px">☐</span>
 | <span title="assignable peripheral" style="font-size:21px">☐</span>
 | Assignment (single choice)
 |-
 | DMA2
 |
 | <span title="assignable peripheral" style="font-size:21px">☐</span>
 | <span title="assignable peripheral" style="font-size:21px">☐</span>
 | Assignment (single choice)
 |-
</onlyinclude>
 |}

==References==
<references/>